| 7.
References
|
1. |
C. L. Seitz, "System Timing," in
Introduction to VLSI Systems, ed. by
Carver Mead and Lynn Conway (Reading, Mass.,
Addison-Wesley, 1980), pp. 242-262. |
|
2. |
Stephen H. Unger, Asynchronous Sequential
Switching Circuits (New York, Wiley-Interscience,
1969). |
|
3. |
Ilana David, Ran Ginosar and Michael Yoeli,
"An Efficient Implementation of Boolean
Functions as Self-Timed Circuits", IEEE
Transactions on Computers, Vol. 41, No.
1, January 1992, pp. 2-10. |
|
4. |
Ivan E. Sutherland, "Micropipelines",
Communications of the ACM, Vol. 32,
No. 6, June 1989, pp. 720-738. |
|
5. |
J. A. Brzozowski and C-J. H. Seger, "Advances
in Asynchronous Circuit Theory Part I:
Gate and Unbounded Inertial Delay Models",
Bulletin of the European Association for
Computer Science, Vol. 42, October 1990,
pp. 198-248. |
|
6. |
J. A. Brzozowski and C-J. H. Seger, "Advances
in Asynchronous Circuit Theory Part II: Unbounded
Inertial Delay Models, MOS Circuits, Design
Techniques", Bulletin of the European
Association for Computer Science, pp.
198-263. |
|
7. |
Karl M. Fant and Scott A. Brandt, NULL
Convention Logic System, US Patent 5,305,463;
April 19,1994. |
|
8. |
H. Hulgaard and P. H Christensen, "Automated
Synthesis of Delay Insensitive Circuits,"
M.Sc. Thesis (IDE 511), Dept of Computer Science,
Tech. Univ. of Denmark, Lyngby, 1990. |
|
