Figure
31 shows the ripple carry adder with an output
asynchronous register.
Figure 31. Ripple carry adder with output asynchronous
register.
The point to appreciate is that the output register
is just another NULL Convention Logic combinational
circuit. There is no difference between the control
expression of the circuit and the data processing
aspect of the circuit and, indeed, they can be
optimized in combination. Figure 32 shows such
an optimization where the last rank of gates in
the circuit are performing both the last stage
of data processing and registration. |