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6. Summary

NULL Convention Logic conveniently and straightforwardly delivers all of the traditionally expected benefits of asynchronous circuit design.

Ease of Design

NULL Convention Logic circuits are purely symbolically determined in that circuit behavior depends solely on the interconnections among the gates. Delay insensitivity is inherent in the logic itself. It does not depend on subtle and expensive circuit constructs. Consequently an NCL circuit is a complete and autonomous expression in and of itself. It signals its own completion of processing and also signals its readiness to accept new input data, without any appeal to an external expression or authority such as a clock, delay line or controller. NCL circuits can be fully expressed in high level languages without regard for timing issues and compiled to silicon in the same sense that high level programs are compiled to machine instructions.

Lower Design Cost and Risk

The clock is eliminated with all its attendant design complexities and risks including clock skew. The system can be designed in parts and then directly composed. There are no global coordination issues as with synchronous systems.

Lower Power Consumption

Only portions of the system that are doing useful work consume power. Integrating logic function and registration in a single gate reduces the power required for system control. There is no spurious switching of transistors. The NULL state is an inherent and automatic power idle state. The clock driving power is eliminated. NCL systems operate entirely in terms of synchronized wave fronts of monotonic level transitions. There are no pulses or edge triggering involved in the circuit behavior. The asynchronous nature of NULL Convention Logic circuits distributes the demand for power.

Convenient Technology Migration

Because the logic is inherently delay insensitive it is insensitive to the behavior properties of the physical implementation. NULL Convention Logic circuits are insensitive to changes in implementation technology, to changes in scale, and to propagation delay changes due to aging or manufacturing variations eliminating portability and evolvability issues.

Automatic Adaptation to Physical Properties

The delays of the various circuit elements change differentially with the change in physical parameters such as voltage, temperature, age, manufacturing variations and different implementation environments. Since the circuits are delay insensitive, they will continue to operate correctly over a large range of variation of these physical parameters.


All failure modes due to timing problems (race, hazards, skew, etc.) are eliminated. NCL provides advantages for design cost and risk, reliability of circuit performance and evolvability beyond the barriers of complexity and feature size facing clocked Boolean logic.


Testing complexity is reduced in that stuck-at-1 faults halt the circuit. Only stuck-at-0 faults need to be exercised with applied patterns. Design time and risk as well as circuit testing requirements are expected to be decreased because of the elimination of the complexity of the clock with its critical timing issues.

Speed of Operation

NULL Convention Logic circuits are speed competitive even though they require two propagation cycles per unit of processing. They will operate at the full rate the logic and material allow and when appropriate will take advantage of average case propagation behavior. There are no margins added onto worst case propagation delays as with clocked circuits. Integration of the registration in logic gates allows more finely grained pipelining and consequently higher throughput rates than convention clocked techniques.

Two value NULL Convention Logic preserves all the advantages of traditional Boolean logic (two values, simple gates, straightforward synthesis) while, additionally, providing self determined, locally autonomous, self synchronizing, delay insensitive, and fault detecting behavior. Furthermore, NCL is compatible with the existing fabrication and design infrastructure and with existing clocked systems allowing convenient low cost market entry.

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