The
Intermediate value composite gate asserts a encoded_NULL
code only when all of its input values are NULL
and expresses a encoded_DATA only when it has
a complete set of input data values. It enforces
the completeness of input criteria for both data
and NULL. Figure 13 shows a three input
threshold two gate.
Figure 13. Intermediate encoded 3 input threshold
2 gate.
Figure 14 shows the Intermediate encoded half-adder
circuit.
Figure 14. Intermediate encoded half-adder
circuit.
Translating between intermediate encoded gates
and hysteresis gates is straightforward. As shown
in Figure 15, the translation from hysteresis
to encoded is simply a matter of fanning out the
single wire. Translating from encoded gates to
hysteresis gates can be done with a single threshold
2 hysteresis gate which discriminates encoded_DATA
from encoded_NULL and ignores encoded_INTERMEDIATE. |
