The Asynchronous Register
To build a system out of NULL Convention combinational
logic circuits we must be able to manage the communication
and interaction among its component circuits.
There must be an asynchronous register, as shown
in Figure 19, that monitors completeness of resolution
as well as readiness to accept new input data
sets and stores the complete set of data values
and the all NULL values between circuits. Each
combinational circuit will have an asynchronous
register at its input.
Figure 19. The asynchronous register.
The asynchronous register shown in Figure 20 is
simply a rank of NULL Convention Logic threshold
gates with feedback hysteresis (Intermediate
value gates won't work here) and a single
gate that watches for complete data sets and all
NULL states. It will manage the interaction among
combinational circuits and is itself a very
simple NULL Convention Logic circuit.
Figure 20. The NULL Convention Logic asynchronous
Each register gate (the threshold 2 gates)
receives one wire with a data meaning and one
wire with a control meaning. The threshold 4 gate
is the watcher gate. When it sees a complete set
of DATA values it will assert DATA and when it
sees all NULL values it transitions to asserting
NULL. When the watcher gate sees a complete data
set, which in this case is one DATA value each
for A, B, C and D input groups, it means that
a complete data set has been received and stored
by the register gates and it will transition its
result value to DATA. The watcher gate will continue
to assert the DATA value until all of its input
values are NULL, which means that the register
gates have received and stored all NULL values.